1. Field of the Invention
The present invention relates to MOS transistors. More specifically, the present invention relates to transistors with thin channels such as gate-all-around transistors
2. Description of the Related Art
FIG. 1 is a known diagram of a gate-all-around transistor. The transistor is formed on a semiconductor substrate 1. An area 2 of substrate 1 is surrounded with an insulating wall 3 formed of a shallow trench filled with an insulator (STI). A single-crystal silicon bridge 4 runs above area 2 and bears against insulating wall 3 on each side of area 2. Bridge 4 is narrower than area 2 so that in top view, area 2 can be seen, on either side of bridge 4. The interval between bridge 4 and area 2 is taken up by a polysilicon portion 5. A polysilicon strip 6 runs above bridge 4 and covers part of area 2 on either side of bridge 4. Portion 5 and strip 6 are in contact and form the transistor gate. The transistor gate is separated from silicon bridge 4 and from area 2 by gate oxide 7. The portions of single-crystal bridge 4 not covered with strip 6 are doped of a first conductivity type and form the transistor source and drain areas, and the covered bridge portion is doped of a second conductivity type and forms the transistor channel.
Such a gate-all-around transistor enables avoiding certain problems intrinsic to small-size conventional transistors, such as the “short channel” effect.
However, for a given channel length, the forming of a gate-all-around transistor of same channel width as a conventional transistor requires increasing the total surface area of the transistor, which goes against the desired evolution.
Moreover, the forming of such a gate-all-around transistors requires an additional manufacturing mask with respect to the forming of a conventional transistor, the additional mask being used, among others, to etch a silicon layer to form bridge 4.